1. Field of the Invention
The present invention generally relates to a substrate with integrated passive devices. More particularly, the present invention is directed to form a substrate with integrated passive devices (IPD) in an under bump metallization (UBM) layer or redistribution layers (RDL).
2. Description of the Prior Art
The rapid growth of the portable wireless electronics industry has provided numerous challenges and opportunities for the manufacturers of radio frequency (RF) components. The latest portable wireless telephony, data, and internet access products require greater functionalities, higher performances, and lower costs in smaller and lighter formats. These requirements have been partly satisfied through major advances in the integrated circuit (IC) device technology and by the introduction of smaller packaging form factors, smaller discrete passive components, and high-density interconnection printed circuit technologies.
The RF sections of the portable wireless products are built with a range of active device technologies combined with high-performance passive components. As many as ninety-five percents of the components in a typical cellular telephone product may be passive devices. In a system using high-frequency electronic components or discrete passive devices, these discrete passive devices may occupy a large portion of the circuit board area and commensurately contribute to a large share of the product assembly costs. For this reason, the so-called integrated passive device (IPD) technology is developed to prevent the increase of the circuit size and of the high-frequency characteristics.
The integrated passive devices (IPD) or the integrated passive components (IPC) are increasingly attracting due to constant needs of handheld wireless devices for further reduction in size and costs and for increase in functionalities. Many functional blocks, such as impedance matching circuits, harmonic filters, couplers, baluns or power combiners/dividers can be realized with IPD technologies. IPDs can be easily fabricated by using current conventional thin film processes and photolithography processes. They can also be designed as flip chip mountable or wire bondable components and are suitable to be fabricated on thin film substrates like silicon, glass or even on low temperature cofired ceramics (LTCC) multiplayer structures.
The IPD technologies hold great potential for significantly reducing circuit board area as well as product size and weight, and/or for allowing increased functionalities in a given product size. The result is a high performance system level solution, which provides the advantages of reduction in die size, weight, number of interconnections and system board space requirements, and can be used in many applications.
Yet challenges still remain in the field of further reduction of the IPD footprint and costs while concurrently simplifying fabrication processes and providing effective coupling and directionality. Accordingly, there is still a need for improving the design and the processes of the current IPD technology.